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    • Design of a High Speed Mixed Signal CMOS Mutliplying Circuit

    • Design of a High Speed Mixed Signal CMOS Mutliplying Circuit

    • design, high speed, mixed-signal, CMOS, mutliplier, circuit, circuit design, short-channel, PMOS, transistors, MOSFET, Cadence Design Systems, nonlinearity, filtering, digital to analog conversion, linear equalization, short-channel effects

    • This thesis presents the design of a mixed-signal CMOS multiplier implemented with short-channel PMOS transistors. The multiplier presented here forms the product of a differential input voltage and a five-bit digital code. A TSMC 0.18 µm...

    • ETD

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