Sponsorship: Los Alamos National Laboratories (LA-UR-02-3163). Field programmable gate arrays (FPGAs) are an attractive alternative for space-based remote sensing applications. However, SRAM-based FPGAs are sensitive to radiation induced single-event upsets within the configuration memory. Such configuration upsets may change the logic, routing, and operating modes of a user FPGA design. Upsets within the configuration of an I/O block are especially troublesome as they may impact the operation of other system components. This paper will evaluate the operation of the I/O block within the Xilinx Virtex FPGA in the presence of configuration memory upsets and introduce techniques for detecting and repairing such failures.